COLUMN-TWIST DEINTERLEAVING FOR LDPC CODES IN COMBINATION WITH 16k QAM and 64k QAM

摘要

The present invention relates to a data processing apparatus (12) and a data processing method which can improve the tolerance of code bits of an LDPC code to errors. Where two or more bits of an LDPC (Low Density Parity Check) code are set as one symbol and are mapped to 2 14 or 2 16 signal points (16k QAM or 64kQAM), a column twist interleaver (24) carries out, as a re-arrangement process for re-arranging code bits of an LDPC code such that a plurality of code bits corresponding to the value 1 included in one arbitrary row of a parity check matrix are not included in one symbol, column twist interleave of changing the writing starting position when code bits are written in a column direction of a memory for each column of the memory. At the receiving side, a column-twist deinterleaver (55) carries out the reverse process. The present invention can be applied, for example, to a reception apparatus for receiving LDPC encoded bits transmitted according to DVB specifications.