发明名称 Tuning capacitance to enhance FET stack voltage withstand
摘要 An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero.
申请公布号 US9177737(B2) 申请公布日期 2015.11.03
申请号 US201314028357 申请日期 2013.09.16
申请人 Peregrine Semiconductor Corporation 发明人 Englekirk Robert Mark
分类号 H01L21/00;H01H11/00;H03K17/10;H03K17/687;H03K17/693;H03K17/16;H03K17/06 主分类号 H01L21/00
代理机构 Jaquez Land Richman LLP 代理人 Jaquez Land Richman LLP ;Jaquez, Esq. Martin J.;Steinfl, Esq. Alessandro
主权项 1. A method of fabricating a stacked RF switch that includes a plurality of series connected constituent transistors in a series string for which internal nodes are those between each pair of adjacent transistors, the method comprising a step of establishing total effective drain-source capacitance Cds values for each constituent transistor in the stack, wherein the Cds value for each constituent transistor is different and at least two constituent transistors are configured such that their Cds values differ from each other by at least 2%.
地址 San Diego unknown
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