| 主权项 |
1. A semiconductor component, comprising:
a semiconductor layer having a front side and a back side; at least one electronic element formed at least partially in the semiconductor layer; a plurality of vias formed in the semiconductor layer and leading from the front side to the back side of the semiconductor layer; a front side metallization layer disposed over at least a part of the front side of the semiconductor layer; a cap disposed over the front side of the semiconductor layer and mechanically coupled to the semiconductor layer, the cap being configured as a front side carrier of the semiconductor component, the cap electrically isolating a front side of the front side metallization layer; a back side metallization layer disposed over at least a part of the back side of the semiconductor layer and electrically connected to one of the plurality of vias; a dielectric layer disposed over parts of the front side of the semiconductor layer, wherein the front side metallization layer is disposed between portions of the dielectric layer, and wherein an upper surface of the front side metallization layer is located at a lower level as an upper surface of the dielectric layer with respect to the front side of the semiconductor layer so that at least one cavity is located between the cap and the front side metallization layer, wherein the front side metallization layer further comprises,
a first redistribution conductive trace electrically connecting a first portion of the back side metallization layer with a first part of the electronic element with a first via of the plurality of vias formed in the semiconductor layer electrically coupling the first redistribution conductive trace to the first portion of the back side metallization layer, anda second redistribution conductive trace electrically connecting a second portion of the back side metallization layer with a second part of the electronic element with a second via of the plurality of vias formed in the semiconductor layer electrically coupling the second redistribution trace portion to the second portion of the back side metallization layer, and wherein the back side metallization layer further comprises a third portion disposed directly on the semiconductor layer; wherein the first, second, and third portions of the back side metallization layer are electrically insulated from each other, and wherein the dielectric layer electrically insulates the first and second redistribution conductive traces from each other. |
