发明名称 Memory generating method of memory compiler and generated memory
摘要 A memory includes a logic controller, a word line driver, a boost circuit, plural capacitor circuits, plural memory cores, plural selectors, and plural output drivers. The logic controller generates a word line enabling signal and a boost enabling signal. The word line driver receives the word line enabling signal. The boost circuit receives the boost enabling signal. The plural capacitor circuits are connected between the boost circuit and the word line driver. Each of the plural memory cores is connected with the word line driver through plural word lines. The plural selectors are connected with the corresponding memory cores. The plural output drivers are connected with the corresponding selectors. The number of the plural memory cores is positively correlated with the number of the plural capacitor circuits.
申请公布号 US9177624(B1) 申请公布日期 2015.11.03
申请号 US201414492687 申请日期 2014.09.22
申请人 Faraday Technology Corp. 发明人 Wu Hao;Yang Song-Wen;Zhang Zhao-Yong;Lee Kun-Ti
分类号 G11C16/04;G11C8/08;G11C5/14 主分类号 G11C16/04
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A memory, comprising: a logic controller generating a word line enabling signal and a boost enabling signal; a word line driver receiving the word line enabling signal; a boost circuit receiving the boost enabling signal; plural capacitor circuits connected between the boost circuit and the word line driver; plural memory cores, wherein each of the plural memory cores is connected with the word line driver through plural word lines; plural selectors connected with the corresponding memory cores; and plural output drivers connected with the corresponding selectors, wherein the number of the plural memory cores is positively correlated with the number of the plural capacitor circuits.
地址 Science-Based Industrial Park, Hsin-Chu TW