发明名称 Method of manufacturing semiconductor device using sidewall films for pitch multiplication in forming interconnects
摘要 According to one embodiment, a semiconductor device includes interconnects extending from a element formation area to the drawing area, and connected with semiconductor elements in the element formation area and connected with contacts in the drawing area. The interconnects are formed based on a pattern of a (n+1)th second sidewall film matching a pattern of a nth (where n is an integer of 1 or more) first sidewall film on a lateral surface of a sacrificial layer. A first dimension matching an interconnect width of the interconnects and an interconnects interval in the element formation area is (k1/2n)×(λ/NA) or less when an exposure wavelength of an exposure device is λ, a numerical aperture of a lens of the exposure device is NA and a process parameter is k1. A second dimension matching an interconnect interval in the drawing area is greater than the first dimension.
申请公布号 US9177854(B2) 申请公布日期 2015.11.03
申请号 US201314025372 申请日期 2013.09.12
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Nakajima Fumiharu;Kotani Toshiya;Mashita Hiromitsu;Taguchi Takafumi;Aburada Ryota;Kodama Chikaaki
分类号 H01L21/44;H01L21/311;H01L21/768;H01L21/033;H01L21/3213;H01L27/06;H01L27/115 主分类号 H01L21/44
代理机构 Finnegan, Henderson, Farabow, Garrett & Dunner, LLP 代理人 Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
主权项 1. A method for manufacturing a semiconductor device comprising: forming a first sidewall film on a lateral surface of a first layer in first and second areas of a semiconductor substrate, the first sidewall film being formed by a first sidewall process and having a first line width; removing the first layer; forming a first mask on the first sidewall film in the second area after the first layer is removed, the first mask being formed by lithography and having a second line width greater than the first line width; forming a pattern by processing a pattern layer above the semiconductor substrate using the first sidewall film and the first mask; forming a plurality of second sidewall films on a lateral surface of the pattern, the second sidewall films being formed by a second sidewall formation process and having a third line width equal to or smaller than the first line width; and processing a processing target layer above the semiconductor substrate using the second sidewall film as a mask, to form a plurality of interconnects; removing the pattern; forming a second mask to cover the second sidewall films in the second area after the pattern is removed, the second mask being formed by lithography and having a fourth line width greater than the third line width; and processing the processing target layer in the first area based on the second sidewall film, and, simultaneously, processing the processing target layer in the second area based on the second mask to form contacts, the contacts having a third dimension greater than the first dimension and being connected to the interconnects, wherein: the interconnects in the first area have at least one of a first interconnect width or a first interconnect interval, the first interconnect interval having a first dimension, andthe interconnects in the second area have a second interconnect interval, the second interconnect interval having a second dimension greater than the first dimension.
地址 Tokyo JP