发明名称 Fault-tolerant unit and method for through-silicon via
摘要 A fault-tolerant unit and a fault-tolerant method for through-silicon via (TSV) are provided. The fault-tolerant unit includes TSV structures TSV1˜TSVn, nodes N11˜N1n, nodes N21˜N2n and a switching module. The TSV structure TSVi is connected between the node N1i of the first chip and the node N2i of the second chip, wherein 1≦i≦n. The switching module is connected between the nodes N21˜N2n of the second chip and a test path of the second chip. In normal operation state, the switching module disconnects the test path and the nodes N21˜N2n when the TSV structures TSV1˜TSVn are valid. The switching module connects the node N2i to at least another one of the nodes N21˜N2n when the TSV structure TSVi is faulty in the normal operation state. In test status, the switching module connects the test path to the nodes N21˜N2n.
申请公布号 US9177940(B2) 申请公布日期 2015.11.03
申请号 US201113236661 申请日期 2011.09.20
申请人 Industrial Technology Research Institute 发明人 Lung Chiao-Ling;Su Yu-Shih;Chang Shih-Chieh;Shi Yiyu
分类号 H03K19/00;H01L25/065;H01L25/00;H01L23/48 主分类号 H03K19/00
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A fault-tolerant unit for through-silicon via (TSV), comprising: n TSV structures TSV1-TSVn, wherein n is an integer; n first nodes N11-N1n, disposed on a first chip of a chip stacking structure; n second nodes N21-N2n, disposed on a second chip of the chip stacking structure, wherein the TSV structure TSVi is electrically connected between the first node N1i and the second node N2i, and 1≦i≦n; and a switch module, disposed on the second chip, and connected between the second nodes N21-N2n and a test path of the second chip; wherein the switch module disconnects the test path and the second nodes N21-N2n when the TSV structures TSV1-TSVn are valid in a normal operation state; the switch module connects the second node N2i to at least one of the other second nodes when the TSV structure TSVi is faulty in the normal operation state; and the switch module connects the test path to the second nodes N21-N2n in a test state.
地址 Hsinchu TW