发明名称 |
System and method for controlling central processing unit power with guaranteed transient deadlines |
摘要 |
Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees for a group of processors to ensure that the processors does not remain in a busy state (e.g., due to transient workloads) for a combined period that is more than a predetermined amount of time above that which is required for one of the processors to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of one or more of the processors based on a variable delay to ensure that the multiprocessor system only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processors. |
申请公布号 |
US9176572(B2) |
申请公布日期 |
2015.11.03 |
申请号 |
US201313759709 |
申请日期 |
2013.02.05 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Thomson Steven S.;Rychlik Bohuslav;Iranli Ali;Sur Sumit;Gargash Norman S. |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
|
代理人 |
Cole Nicholas A. |
主权项 |
1. A method of improving performance on a computing device having multiple processors, the method comprising:
determining a steady state workload of a first processor; determining an amount of work required to perform the determined steady state workload on the first processor; computing a performance guarantee value for a processing group that includes the first processor and a second processor; transitioning the first processor from an idle state to a busy state; performing dynamic clock and voltage scaling operations to scale a frequency of the first processor based on an actual workload of the first processor; determining whether the first and second processors have remained in the busy state for a combined period greater than or equal to a sum of the determined amount of work and the performance guarantee value; and increasing the frequency of one of the first and second processors when it is determined that the first and second processors have remained in the busy state for a combined period that is greater than or equal to the sum of the determined amount of work and the performance guarantee value. |
地址 |
San Diego CA US |