Memory interface offset signaling

摘要

A memory interface includes circuitry configured for applying a variable delay to a portion of a data signal and applying a variable delay to a data strobe. The delayed data strobe samples the delayed portion of the data signal. Delayed portions of the data signal are spaced away from non-delayed portions of the data signal by alternating the routing of delayed bits and non-delayed bits of the data signal. A training block determines and sets a value of the variable delay corresponding to a largest value of a number of recorded eye aperture widths.

主权项

1. A memory interface method, comprising:
applying an operating delay to only a first set of bits of a data channel of a memory interface waveform; transmitting the delayed first set of bits across a memory interface; transmitting a second set of bits of the data channel across the memory interface, in which a first set of signal lines transferring the first set of bits is interwoven with a second set of signal lines transferring the second set of bits on the data channel; applying a strobe delay to a first strobe to generate a second strobe; transmitting the first strobe and the second strobe across the memory interface; sampling the delayed first set of bits with the second strobe; and sampling the second set of bits with the first strobe.