发明名称 PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a processing system configured to perform polling with low power consumption.SOLUTION: A polling circuit (202): includes an address signal generating section which converts an address signal of a first address range, which is input from a processing apparatus (201), to a signal of a second address range, and outputs it to a peripheral circuit (PH1), and on the other hand, outputs the same address signal as that input from the processing apparatus, to the peripheral circuit, when the address signal input from the processing apparatus does not have the first address range; and a ready signal generating section which outputs the same ready signal as that of input from the peripheral circuit when the address signal input from the processing apparatus is an address of the first address range and a read data signal input from the peripheral circuit is the same as an expectation value corresponding to the address signal input from the processing apparatus, and on the other hand, outputs an inactive ready signal to the processing apparatus in the other cases.
申请公布号 JP2015191279(A) 申请公布日期 2015.11.02
申请号 JP20140066182 申请日期 2014.03.27
申请人 FUJITSU LTD 发明人 KAWAKAMI KENTARO
分类号 G06F9/48 主分类号 G06F9/48
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