发明名称 SIGNAL PROCESSOR AND METHOD
摘要 PROBLEM TO BE SOLVED: To make it possible to perform clock transfer depending on a jitter amount at the time of system configuration.SOLUTION: A counter initial distance determination unit decreases a counter initial distance when it is determined that a margin A, which is a margin in the case of a phase of a reading clock advancing relative to that of a writing clock, is sufficient; and increases the counter initial distance when it is determined that the margin A is not sufficient and a margin B is sufficient. The determination is performed, for example, by setting a threshold. This disclosure can be applied, for example, to a signal processor including a clock transfer circuit.
申请公布号 JP2015192406(A) 申请公布日期 2015.11.02
申请号 JP20140069939 申请日期 2014.03.28
申请人 SONY CORP 发明人 NAKAHARA KENTARO;OKUMURA HIROYUKI
分类号 H04L13/08;H04L7/00 主分类号 H04L13/08
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