| 摘要 |
Method consists in mapping the converted voltage value (U IN ) by electric charge value proportional to the converted voltage value (U IN ) and in accumulation of charge in the sampling capacitor (C n ) until the voltage (U n ) on this capacitor is equal to the converted voltage (U IN ). Then, method consists in realization of the process of that electric charge redistribution in the array of redistribution (A) by changes of states of signals from relevant control outputs and in assignment of relevant values to bits in the digital word by means of the control module (CM). Method is characterized in that as soon as accumulation of electric charge in the sampling capacitor (C n ) is terminated, electric charge is accumulated in the additional sampling capacitor (C nA ), then the process of that electric charge redistribution is realized and relevant values are assigned to bits of the digital word. As soon as a trigger signal is detected, next cycle begins and electric charge is accumulated again in the sampling capacitor (C n ). Apparatus comprises the array of redistribution (A), the section of the sampling capacitor (An), the control module (CM), three comparators (K1, K2 and K3) and two current sources (I, J) connected in a known way. Apparatus is characterized in that the additional sampling capacitor (C nA ) and plates change-over switches (S Tn , S TnA , S Bn , S BnA ) are connected in the section of the sampling capacitor (An). Furthermore, the additional capacitor (C n-1A ) having the highest capacitance value in the array of redistribution and change-over switches (S Tn-1 , S Tn-1A , S Bn-1 , S Bn-1A ) are connected to the capacitor (C n-1 ) having the highest capacitance value in the array of redistribution in a similar way as to the sampling capacitor (C n ). |
