| 发明名称 |
METHOD, APPARATUS AND SYSTEM FOR AN EDGE RATE CONTROLLED OUTPUT BUFFER |
| 摘要 |
A circuit for minimizing variation over process, voltage and temperature for edge rate over and propagation delay. The circuit includes at least two first buffers for decoupling large nonlinear parasitic capacitors of the main drivers, at least two second buffers for level shifting to the at least two first buffers, at least two voltage sources for initializing the stage of at least one of the first or the second buffer, and a current source generator coupled to the voltage source of the second buffers. |
| 申请公布号 |
US2015311893(A1) |
申请公布日期 |
2015.10.29 |
| 申请号 |
US201514693475 |
申请日期 |
2015.04.22 |
| 申请人 |
Texas Instruments Incorporated |
发明人 |
Jang Byungchul B.;Merkin Timothy B. |
| 分类号 |
H03K17/16 |
主分类号 |
H03K17/16 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A circuit for minimizing variation over process, voltage and temperature for edge rate over and signal independent propagation delay, comprising:
at least two first buffers for decoupling large nonlinear parasitic capacitors of the main drivers; at least two second buffers for level shifting to the at least two first buffers; and at least two voltage sources for initializing the stage of at least one of the first or the second buffer; and a current source generator coupled to the voltage source of the second buffers. |
| 地址 |
Dallas TX US |
