MULTIPLE FIN FINFET WITH LOW-RESISTANCE GATE STRUCTURE

摘要

Embodiments of the present invention provide a multiple fin field effect transistor (finFET) with low-resistance gate structure. A metallization line is formed in parallel with the gate, and multiple contacts are formed over the fins which connect the metallization line to the gate. The metallization line provides reduced gate resistance, which allows fewer transistors to be used for providing In-Out (IO) functionality, thereby providing space savings that enable an increase in circuit density.

主权项

1. A semiconductor structure, comprising:
a semiconductor substrate; a plurality of fins formed in the semiconductor substrate; a gate disposed over the plurality of fins; a plurality of contacts in direct physical contact with the gate and directly over the plurality of fins; and a metallization line disposed over the plurality of contacts, wherein the metallization line is in electrical contact with the plurality of contacts.