发明名称 |
SCHEDULING METHOD OF HARDWARE THREAD IN MULTI-THREAD PROCESSOR |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a multi-thread processor for selecting a flexible hardware thread while ensuring the minimum execution time of a hardware thread.SOLUTION: A multi-thread processor 1 includes: a plurality of hardware threads; a thread scheduler 19 that outputs a thread selection signal TSEL for selecting hardware threads; a first selector 18 that outputs an instruction generated by the hardware thread selected according to the thread selection signal TSEL; and an arithmetic circuit 10 that executes the instruction. The thread scheduler 19 fixedly selects the hardware threads in a first execution period; and selects the optional hardware threads in a second execution period. Ratio between the first execution period and the second execution period and ratio of hardware threads executed in the first execution period are optionally set by a management program that is executed on the arithmetic circuit.</p> |
申请公布号 |
JP2015187888(A) |
申请公布日期 |
2015.10.29 |
申请号 |
JP20150126242 |
申请日期 |
2015.06.24 |
申请人 |
RENESAS ELECTRONICS CORP |
发明人 |
ADACHI KOJI;MIYAMOTO KAZUNORI |
分类号 |
G06F9/48;G06F9/38;G06F9/46 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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