发明名称 ELECTRONIC DEVICE
摘要 Provided are, among others, memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device which includes a semiconductor memory unit comprising one or more columns and a date line and a data line bar connected with a column selected among the one or more columns. Each of the one or more columns includes a plurality of storage cells each configured to store 1-bit data, each storage cell including a first and second variable resistance elements; a bit line and a source line connected to the first variable resistance element; connected to the other end of the first variable resistance element; a bit line bar and a source line bar connected to the second variable resistance element; and a driving block configured to latch data of the data line and the data line bar.
申请公布号 US2015310913(A1) 申请公布日期 2015.10.29
申请号 US201414503069 申请日期 2014.09.30
申请人 SK hynix Inc. 发明人 Kim Dong-Keun
分类号 G11C13/00;G06F3/06;G11C5/06 主分类号 G11C13/00
代理机构 代理人
主权项 1. An electronic device including a semiconductor memory unit, the semiconductor memory unit comprising: one or more columns; and a data line and a data line bar connected with a column selected among the one or more columns, each of the one or more columns including: a plurality of storage cells each configured to store 1-bit data, each storage cell including a first variable resistance element which has a first resistance value when a first value is stored therein and a second resistance value when a second value is stored therein and a second variable resistance element which has the second resistance value when the first value is stored therein and the first resistance value when the second value is stored therein;a bit line connected to one end of the first variable resistance element;a source line connected to the other end of the first variable resistance element;a bit line bar connected to one end of the second variable resistance element;a source line bar connected to the other end of the second variable resistance element; anda driving block configured to latch data of the data line and the data line bar when a corresponding column is selected, the driving block configured to, in a write operation, drive the bit line and the source line bar with one voltage of a first voltage and a second voltage, and the source line and the bit line bar with another voltage of the first voltage and the second voltage based on a value of the latched data, and the driving block further configured to, in a read operation, latch data corresponding to a current flowing through the bit line and the bit line bar.
地址 Icheon-Si KR