| 摘要 |
The semiconductor package includes a semiconductor chip (1) mounted on the base substrate (2). The semiconductor chip includes a core region disposed in a center part of the semiconductor chip, an internal circuit being provided in the core region. The semiconductor chip (1) includes a plurality of IO cell regions (I01, I02, I03) disposed in a line along a side of the semiconductor chip (1), a differential circuit being provided in each of the plurality of IO cell regions (I01, I02, I03). The semiconductor chip (1) includes a non-inverting pad electrode (P1, P2, P3) disposed above each of the IO cell regions (I01, I02, I03) and electrically connected to a non-inverting terminal of the differential amplifying circuit (A1, A2, A3). The semiconductor chip includes an inverting pad electrode (N1, N2, N3) disposed above each of the IO cell regions (I01, I02, I03) and connected to an inverting terminal of the differential circuit. A first set of a first non-inverting pad electrode (P1) and a first inverting pad electrode (N1) is disposed above a first IO cell region (I01) of the plurality of IO cell regions (I01, I02, I03), and the first set is disposed so that the first non-inverting pad electrode (P1) and the first inverting pad electrode (N1) are disposed along a first line (Y1) along the side (1a) of the semiconductor chip (1); andwherein a second set of a second non-inverting pad electrode (P2) and a second inverting pad electrode (N2) is disposed above a second IO cell region (102) of the plurality of IO cell regions (I01, I02, I03), and the second set is disposed so that the second non-inverting pad electrode (P2) and the second inverting pad electrode (N2) are disposed along a second line (Y2) along the side (1a) of the semiconductor chip (1). |
