| 摘要 |
Embodiments of the invention relate to a variable-width command/address bus (CA bus). In one embodiment, a memory controller includes first logic to determine whether a memory device is in a first mode or a second mode. The memory controller includes second logic to transmit a command to the memory device with a command/address bus having a first width over a first number of clock edges when the memory device is in the first mode, and with the command/address bus having a second width over a second number of clock edges when the memory device is in the second mode. |
