发明名称 |
Time-to-digital converter and PLL circuit using the same |
摘要 |
A time-to-digital converter (TDC) that has high resolution, excellent linearity, and a widerange. The TDC includes a first oscillator unit that generates and outputs a pair of first oscillation signals based on a pair of predetermined clock signals that have a predetermined phase difference, a second oscillator unit that generates and outputs a second oscillation signal that have a predetermined frequency based on the pair of first oscillation signals outputted from the first oscillator unit, and a quantizer that calculates a quantized value based on a number of edges of the second oscillation signal outputted from the second oscillator unit. |
申请公布号 |
US9170564(B2) |
申请公布日期 |
2015.10.27 |
申请号 |
US201414554737 |
申请日期 |
2014.11.26 |
申请人 |
MegaChips Corporation |
发明人 |
Sato Hideyuki |
分类号 |
H03L7/06;G04F10/00;H03L7/099;H03L7/093;H03L7/08 |
主分类号 |
H03L7/06 |
代理机构 |
Osha Liang LLP |
代理人 |
Osha Liang LLP |
主权项 |
1. A time-to-digital converter comprising:
a first oscillator unit that generates and outputs a pair of first oscillation signals based on a pair of predetermined clock signals having a predetermined phase difference therebetween; a second oscillator unit that generates and outputs a second oscillation signal having a predetermined frequency based on the pair of first oscillation signals outputted from the first oscillator unit; and a quantizer that calculates a quantized value based on a number of edges of the second oscillation signal outputted from the second oscillator unit. |
地址 |
Osaka JP |