发明名称 Layout generating method
摘要 A design layout generating method is provided. A design layout including a first pattern and a second pattern is provided to a computer system, wherein the first pattern and the second pattern meet a design rule of an integrated circuit, respectively. The first pattern and the second pattern are combined into a third pattern. Next, the third pattern is checked if it meets a definition of a weak pattern, wherein the weak pattern is a pattern that meets the design rule but still forms defects. Then, the third pattern is modified and a new design layout is generated.
申请公布号 US9171127(B1) 申请公布日期 2015.10.27
申请号 US201414509074 申请日期 2014.10.08
申请人 UNITED MICROELECTRONICS CORP. 发明人 Hou Chun-Liang;Liao Wen-Jung;Huang Chi-Fang;Chang Yi-Jung
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A design layout generating method, comprising: providing a design layout including a first pattern and a second pattern to a computer system, wherein the first pattern and the second pattern meet a design rule of an integrated circuit, respectively; combining the first pattern and the second pattern into a third pattern; checking if the third pattern meets a definition of a weak pattern, wherein the weak pattern is a pattern that meets the design rule but still forms defects; and modifying the third pattern and generating a new design layout.
地址 Science-Based Industrial Park, Hsin-Chu TW