Three dimensional non-volatile storage with interleaved vertical select devices above and below vertical bit lines

摘要

A three-dimensional array of memory elements reversibly change a level of electrical conductance/resistance in response to one or more voltage differences being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Local bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes. Vertically oriented select devices are used to connect the local bit lines to global bit lines. A first subset of the vertically oriented select devices are positioned above the vertically oriented bit lines and a second subset of the vertically oriented select devices (interleaved with the first subset of the vertically oriented select devices) are positioned below the vertically oriented bit lines.

主权项

1. A non-volatile storage system, comprising:
a substrate; a monolithic three dimensional array of memory cells positioned above and not in the substrate; a plurality of signal lines; a plurality of vertically oriented bit lines that are above and not in the substrate, the vertically oriented bit lines are connected to the array of memory cells; a plurality of vertically oriented select devices that are above the substrate but not in the substrate, the vertically oriented select devices are connected to the vertically oriented bit lines and the signal lines, a first subset of the vertically oriented select devices are positioned above the vertically oriented bit lines and a second subset of the vertically oriented select devices are positioned below the vertically oriented bit lines in an interleaved manner such that every other vertically oriented select device along a first direction are positioned above the vertically oriented bit lines with intervening vertically oriented select devices positioned below the vertically oriented bit lines, when the vertically oriented select devices are actuated the vertically oriented bit lines are in communication with the signal lines; a plurality of word lines connected together and connected to a set of the memory cells, the word lines connected together form a first word line comb having multiple word line fingers, and a controller for choosing slices of memory cells for a concurrent memory operation based on the slices being connected to the first word line comb but on different fingers of the first word line comb, at least one of the slices interacts with the vertically oriented bit lines that connect to a first subset of the signal lines including global bit lines positioned above the vertically oriented bit lines and the other at least one slice interacts with vertically oriented bit lines connecting to a second subset of the signal lines including global bit lines positioned below the vertically oriented bit lines.