发明名称 Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
摘要 A system of interconnected chips comprising a multi-chip module (MCM) includes a processor chip, a system functions chip, and an MCM package configured to include the processor chip, the system functions chip, and an interconnect circuit. The processor chip is configured to include a first ground-referenced single-ended signaling interface circuit. A first set of electrical traces manufactured within the MCM package and configured to couple the first single-ended signaling interface circuit to the interconnect circuit. The system functions chip is configured to include a second single-ended signaling interface circuit and a host interface. A second set of electrical traces manufactured within the MCM package and configured to couple the host interface to at least one external pin of the MCM package. In one embodiment, each single-ended signaling interface advantageously implements ground-referenced single-ended signaling.
申请公布号 US9170980(B2) 申请公布日期 2015.10.27
申请号 US201313973952 申请日期 2013.08.22
申请人 NVIDIA Corporation 发明人 Dally William J.;Alben Jonah M.;Poulton John W.;Greer, III Thomas Hastings
分类号 G11C11/40;G06F15/78 主分类号 G11C11/40
代理机构 Zilka-Kotab, PC 代理人 Zilka-Kotab, PC
主权项 1. A system, comprising: a processor chip configured to include a first ground-referenced single-ended signaling (GRS) interface circuit, the first GRS interface circuit comprising: a first GRS driver circuit configured to: pre-charge a first capacitor to store a first charge during a first pre-charge phase; anddrive an output signal relative to a ground network based on the first charge during a first drive phase; a second GRS driver circuit, configured to: pre-charge a second capacitor to store a second charge during a second pre-charge phase; anddrive the output signal relative to the ground network based on the second charge during a second drive phase; and a receiver circuit, configured translate a GRS input signal to a corresponding logic signal; a system functions chip configured to include a second GRS interface circuit and a host interface; a multi-chip module (MCM) package configured to include the processor chip and the system functions chip; a first set of electrical traces manufactured within the MCM package and configured to couple the first GRS interface circuit to the second GRS interface circuit, wherein the first set of electrical traces comprise the GRS input signal, the output signal, and the ground network; and a second set of electrical traces manufactured within the MCM package and configured to couple the host interface to at least one external pin of the MCM package, wherein the first GRS interface circuit is a primary communications interface between the processor chip and the system functions chip.
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