发明名称 Interrupt assigning method, interrupt control method, and system therefor
摘要 A multicore processor system includes core configured to detect a process assignment instruction; acquire a remaining time obtained by subtracting a processing time of interrupt processing assigned to an arbitrary core of a multicore processor from a period that is from a calling time of the interrupt processing to an execution time limit of the interrupt processing, upon detecting the process assignment instruction; judge if the remaining time acquired at the acquiring is greater than or equal to a processing time of processing defined to limit an interrupt in the process; and assign the process to the arbitrary core, upon judging that the remaining time is greater than or equal to the processing time of the processing defined to limit an interrupt in the process.
申请公布号 US9170965(B2) 申请公布日期 2015.10.27
申请号 US201313752138 申请日期 2013.01.28
申请人 FUJITSU LIMITED 发明人 Yamashita Koichiro;Suzuki Takahisa;Yamauchi Hiromasa;Kurihara Koji
分类号 G06F13/24;G06F13/26;G06F1/32;G06F9/48;G06F9/50 主分类号 G06F13/24
代理机构 Arent Fox LLP 代理人 Arent Fox LLP
主权项 1. A multicore processor system comprising core configured to: detect a process assignment instruction; acquire a remaining time obtained by subtracting a processing time of interrupt processing assigned to an arbitrary core of a multicore processor from a period that is from a calling time of the interrupt processing to an execution time limit of the interrupt processing, upon detecting the process assignment instruction; judge if the remaining time acquired at the acquiring is greater than or equal to a processing time of processing defined to limit an interrupt in the process; and assign the process to the arbitrary core, upon judging that the remaining time is greater than or equal to the processing time of the processing defined to limit an interrupt in the process.
地址 Kawasaki JP