Memory with multiple levels of data retention

摘要

A method for operating a memory includes receiving a command to program a data value at a memory cell, and an indication of which write mode in a plurality of write modes to use. Write modes in the plurality are characterized by different sets of resistance ranges that correspond to data values stored in the memory cell. The method includes executing a program operation according to the indicated one in the plurality of write modes to program the data value in the memory cell. The plurality of write modes includes a first write mode and a second write mode corresponding to shorter data retention than the first write mode. The first and second write modes are characterized by first and second sets of resistance ranges in the different sets of resistance ranges. The method includes periodically refreshing data values in memory cells storing data in the second write mode.

主权项

1. A method for operating a memory, comprising:
receiving a command to program a data value at a memory cell, and an indication of which write mode in a plurality of write modes to use, write modes in the plurality being characterized by different sets of resistance ranges that correspond to data values stored in the memory cell and including a first write mode and a second write mode corresponding to shorter data retention than the first write mode; executing a program operation according to the indicated one in the plurality of write modes to program the data value in the memory cell; refreshing data values in memory cells in the memory storing data in the second write mode using a first refresh process; and refreshing data values in memory cells in the memory storing data in the first write mode with a second refresh process, the second refresh process causing refreshing at times between refresh different than times between refresh caused by the first refresh process, wherein the first write mode being characterized by a first set of resistance ranges in the different sets of resistance ranges, and the second write mode being characterized by a second set of resistance ranges in the different sets of resistance ranges.