发明名称 |
Recovering from data errors using implicit redundancy |
摘要 |
Some implementations disclosed herein provide techniques and arrangements for recovery of data stored in memory shared by a number of processors through information stored in a cache directory. A core of a processor may initiate access (e.g., read or write) to particular data located in a first cache that is accessible to the core. In response to detecting an error associated with accessing the particular data, a location in the processor that includes the particular data may be identified and the particular data may be copied from the location to the first cache. |
申请公布号 |
US9170947(B2) |
申请公布日期 |
2015.10.27 |
申请号 |
US201113992732 |
申请日期 |
2011.12.29 |
申请人 |
Intel Corporation |
发明人 |
Vera Xavier;Monchiero Matteo;Casado Javier Carretero;Herrero Enric;Ramirez Tanausu |
分类号 |
G06F13/00;G06F12/08;G06F11/00;G06F11/08;G06F11/16;G06F12/12;G06F11/20 |
主分类号 |
G06F13/00 |
代理机构 |
Nicholson De Vos Webster & Elliott LLP |
代理人 |
Nicholson De Vos Webster & Elliott LLP |
主权项 |
1. A processor comprising:
a plurality of cores including a first core and a second core; a cache directory to store information indicating whether particular data is stored in one or more caches that are shared by the plurality of cores, the cache directory to include a directory entry structure associated with an entry in the cache directory, the directory entry structure to include a first field to indicate when the first core has copied the particular data to modify the particular data in a cache local to the first core and a second field to indicate whether a copy of the particular data in a shared memory has been modified. |
地址 |
Santa Clara CA US |