APPARATUSES AND METHODS FOR IMPLEMENTING MASKED WRITE COMMANDS
摘要
Apparatuses and methods for implementing masked write commands are disclosed herein. An example apparatus may include a memory bank, a local buffer circuit, and an address control circuit. The local buffer circuit may be associated with the memory bank. The address control circuit may be coupled to the memory bank and configured to receive a command and an address associated with the command. The address control circuit may include a global buffer circuit configured to store the address. The address control circuit may further be configured to delay the command using one of a plurality of command paths based, at least in part, on a write latency and to provide the address stored in the global buffer circuit to the local buffer circuit to be stored therein.
申请公布号
WO2015160569(A1)
申请公布日期
2015.10.22
申请号
WO2015US24694
申请日期
2015.04.07
申请人
MICRON TECHNOLOGY, INC.
发明人
HADRICK, MARK K.;WRIGHT, JEFFREY P.;WONG, VICTOR;LOVETT, SIMON J.;MORGAN, DONALD M.;JONES, WILLIAM F.;AYYAPUREDDI, SUJEET;GANS, DEAN D.;KWAK, JONGTAE