发明名称 |
Cycling endurance extending for memory cells of a non-volatile memory array |
摘要 |
Examples are disclosed for cycling endurance extending for memory cells of a non-volatile memory array. The examples include implementing one or more endurance extending schemes based on program/erase cycle counts or a failure trigger. The one or more endurance extending schemes may include a gradual read window expansion, a gradual read window shift, an erase blank check algorithm, a dynamic soft-program or a dynamic pre-program. |
申请公布号 |
US9164836(B2) |
申请公布日期 |
2015.10.20 |
申请号 |
US201113976007 |
申请日期 |
2011.12.28 |
申请人 |
INTEL CORPORATION |
发明人 |
Guo Xin;Pangal Kiran;Wakchaure Yogesh B.;Ruby Paul D.;Kumar Ravi J. |
分类号 |
G06F11/00;G06F11/10;G11C11/56;G11C16/06;G11C16/26;G11C16/34 |
主分类号 |
G06F11/00 |
代理机构 |
Kacvinsky Daisak Bluni PLLC |
代理人 |
Kacvinsky Daisak Bluni PLLC |
主权项 |
1. A method comprising:
determining a current program/erase cycle count for one or more memory cells of a non-volatile memory array; comparing the current program/erase cycle to a first target program/erase cycle count; and implementing one or more cycling endurance extending schemes based on whether the current program/erase cycle count exceeds the first target program/erase cycle count or based on whether a failure trigger associated with the one or more memory cells has been reached, the one or more cycling endurance extending schemes to include at least one of a gradual read window expansion that includes incrementally extending a read window for reading the one or more memory cells by adjusting an erase threshold voltage to cause the read window to have a larger threshold voltage range to read all programmed values from the one or more memory cells, a gradual read window shift that includes incrementally shifting the read window for reading one or more memory cells by raising the erase threshold voltage and lowering a program threshold to cause the read window to shift while maintaining a threshold voltage range to read all programmed values from the one or more memory cells, an erase blank check algorithm, a dynamic soft-program or a dynamic pre-program. |
地址 |
Santa Clara CA US |