发明名称 Non-volatile memory devices and related operating methods
摘要 Non-volatile memory devices and related methods are provided. The non-volatile memory devices include a memory cell array having a plurality of cell strings, each cell string including: a plurality of memory cells stacked in a direction perpendicular to a substrate, a ground selection transistor between the plurality of memory cells and the substrate, and a string selection transistor between the plurality of memory cells and a bit line; an address decoder coupled to the plurality of memory cells in the plurality of cell strings through word lines, to the string selection transistors in the plurality of cell strings through string selection lines, and to the ground selection transistors in the plurality of cell strings through a ground selection line; a read/write circuit coupled to the string selection transistors in the plurality of cell strings through the bit lines; and control logic configured to adjust a substrate voltage applied to the substrate such that threshold voltages of the ground selection transistors are higher than a predetermined level during read operations for at least one of the plurality of memory cells in the plurality of cell strings.
申请公布号 US9165660(B2) 申请公布日期 2015.10.20
申请号 US201414471231 申请日期 2014.08.28
申请人 Samsung Electronics Co., Ltd. 发明人 Lee Dong-Jun;Moon Sungsu;Song Jaihyuk;Lee Changsub
分类号 G11C16/04;G11C16/10;G11C16/26 主分类号 G11C16/04
代理机构 Myers Bigel Sibley & Sajovec 代理人 Myers Bigel Sibley & Sajovec
主权项 1. A nonvolatile memory device comprising: a memory cell array having a plurality of cell strings, each cell string comprising: a plurality of memory cells stacked in a direction perpendicular to a substrate, a ground selection transistor between the plurality of memory cells and the substrate, and a string selection transistor between the plurality of memory cells and a bit line;an address decoder coupled to the plurality of memory cells in the plurality of cell strings through word lines, to the string selection transistors in the plurality of cell strings through string selection lines, and to the ground selection transistors in the plurality of cell strings through a ground selection line;a read/write circuit coupled to the string selection transistors in the plurality of cell strings through the bit lines; andcontrol logic configured to adjust a substrate voltage applied to the substrate such that threshold voltages of the ground selection transistors are higher than a predetermined level during read operations for at least one of the plurality of memory cells in the plurality of cell strings.
地址 KR