| 摘要 |
A memory controller of a mass memory device determining that a memory operation has been initiated which involves the mass memory device, and in response dynamically checks for available processing resources of a host device that is operatively coupled to the mass memory device and thereafter puts at least one of the available processing resources into use for performing the memory operation. In various non-limiting examples: the available processing resources may be a core engine of a multi-core CPU, a DPS or a graphics processor; central processing unit; a digital signal processor; and a graphics processor; and it may also be dynamically checked whether memory resources of the host are available and those can be similarly put into use (e.g., write data to a DRAM of the host, process data in the DRAM with the host DSP, then write the processed data to the mass memory device). |
| 主权项 |
1. A method comprising:
in relation to a memory operation, determining, by a memory device, available processing resources of a host device that is operatively coupled to the memory device, wherein the determining the available processing resources comprises checking one or more registers of the memory device, the one or more registers operable to store host device resource availability information that is updateable by the host device; and putting, by the memory device, at least one available processing resource of the available processing resources into use for performing at least part of the memory operation, wherein the at least one available processing resource comprises a digital signal processor (DSP) of the host device and the putting the DSP into use for performing the at least part of the memory operation includes transmitting, by the memory device, a request to the host device for the DSP to process data written temporarily to dynamic random access memory (DRAM) of the host device prior to writing the data from the host device to a memory of the memory device. |
