发明名称 Digital pulse width generator and method for generating digital pulse width
摘要 A digital pulse width generator and a method for generating a digital pulse width are provided. The method for generating a digital pulse width includes the following. Generating a first period according to first set of bits of pulse data. The first period includes an interval. First phase signals are set to a first logic value in the interval and are generated according to first phase clock signals after an end of the interval. Second phase signals are set to the first logic value in the first period and are generated according to second phase clock signals after an end of the first period. Selecting a first signal from the first phase signals and the second phase signals according to second set of bits of the pulse data as a pulse width signal.
申请公布号 US9166843(B2) 申请公布日期 2015.10.20
申请号 US201314062666 申请日期 2013.10.24
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 Huang Chao-Jen;Chang Ya-Ting;Chen Ke-Horng
分类号 H03D3/24;H04L27/06;H04L25/49 主分类号 H03D3/24
代理机构 Muncy, Geissler, Olds & Lowe, P.C. 代理人 Muncy, Geissler, Olds & Lowe, P.C.
主权项 1. A method for generating a digital pulse width, comprising: generating a first period according to a first set of bits of pulse data, wherein the first period comprises an interval, a plurality of first phase signals are set as a first logic value in the interval, the plurality of first phase signals are generated according to a plurality of first phase clock signals after an end of the interval, a plurality of second phase signals are set as the first logic value in the first period, the plurality of second phase signals are generated according to a plurality of second phase clock signals after an end of the first period, the interval starts at the same time with the first period, the interval ends earlier than the first period, and the plurality of first phase clock signals have different phases from the plurality of second phase clock signals; and selecting a first signal from the plurality of first phase signals and the plurality of second phase signals according to a second set of bits of the pulse data as a pulse width signal, wherein the plurality of first phase signals and the plurality of second phase signals are inputted to a multiplexer, and the multiplexer selects the first signal according to an output value of a register.
地址 Hsinchu County TW