发明名称 Multiple port routing circuitry for flash memory storage systems
摘要 An integrated circuit (“IC”) may have flash memory circuitry associated with it. The IC may also have controllable routing circuitry for routing signal information (1) between the flash memory circuitry and any one of a plurality of signal ports of the IC, or (2) between various ones of those signal ports. Multiple instance of such ICs and their associated flash memory circuitries may be connected to one another via the above-mentioned signal ports to provide flash memory storage systems of any size in which data can be routed in and out at least partly via the controllable routing circuitries of the various ICs.
申请公布号 US9164914(B1) 申请公布日期 2015.10.20
申请号 US201012728757 申请日期 2010.03.22
申请人 Marvell World Trade Ltd. 发明人 Zhou Wei;Chu Chee Hoe;Chang Po-Chien
分类号 G06F12/02;G06F12/00;G06F13/00;G06F13/28;G06F17/30;G11C8/12;G06F12/10;H01L25/065 主分类号 G06F12/02
代理机构 代理人
主权项 1. An integrated circuit comprising: flash memory controller circuitry; a plurality of data signal ports including at least a plurality of external ports and an internal port; and controllable routing circuitry comprising programmable routing table circuitry configured to convert an identification of another instance of said integrated circuit to a port-to-port connection to be made by the controllable routing circuitry, wherein the controllable routing circuitry is configured to: receive, over a first external port, signals indicative of (1) a flash memory address, (2) data payload, and (3) an identification of a destination integrated circuit corresponding to a desired destination of the flash memory address and the data payload; andtransmit the flash memory address and the data payload from the first external port to a destination port, wherein: if the integrated circuit is the destination integrated circuit, the destination port is the internal port, which transmits at least the data payload to the flash memory controller circuitry on the integrated circuit; andif another integrated circuit is the destination integrated circuit, the destination port is a second external port in the plurality of external ports as determined by cross-referencing the identification of the destination integrated circuit with said routing table circuitry, wherein the flash memory controller circuitry, the plurality of data signal ports, and the controllable routing circuitry are implemented in a System-on-Chip (SoC) configuration of the integrated circuit.
地址 St. Michael BB