| 发明名称 | Stacked package and method for manufacturing the same | ||
| 摘要 | The disclosure relates to a stacked package and a method for manufacturing the same. The stacked package includes: a lower package including a substrate formed with ball lands in a periphery of an upper surface thereof, a semiconductor chip mounted over the upper surface, first solder balls formed over the ball lands and each having a side surface cut along an edge of the substrate and a polished upper surface, and a mold part for molding the upper surface including the semiconductor chip and the first solder balls, the cutted side surfaces and polished upper surfaces being exposed by the mold part; and an upper package stacked over the lower package and provided with second solder balls bonded to the first solder balls. | ||
| 申请公布号 | US9165899(B2) | 申请公布日期 | 2015.10.20 |
| 申请号 | US201314083687 | 申请日期 | 2013.11.19 |
| 申请人 | SK Hynix Inc. | 发明人 | Joh Cheol Ho |
| 分类号 | H01L23/488;H01L23/00;H01L25/065;H01L25/00;H01L23/498;H01L23/538;H01L25/10;H01L23/31;H01L21/56 | 主分类号 | H01L23/488 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A stacked package, comprising: a lower package including a substrate formed with ball lands in a periphery of an upper surface thereof, a semiconductor chip mounted over the upper surface, first solder balls formed over the respective ball lands and each of said first solder balls having a side surface cut along an edge of the substrate and a polished upper surface, and a mold part for molding the upper surface, the semiconductor chip and the first solder balls, the cutted side surface and polished upper surface of the first solder balls being exposed by the mold part; and an upper package stacked over the lower package and provided with second solder balls bonded to the first solder balls. | ||
| 地址 | Gyeonggi-do KR | ||