Power overlay structure with leadframe connections

摘要

A power overlay (POL) packaging structure that incorporates a leadframe connection is disclosed. The a POL structure includes a POL sub-module having a dielectric layer, at least one semiconductor device attached to the dielectric layer and that includes a substrate composed of a semiconductor material and a plurality of connection pads formed on the substrate, and a metal interconnect structure electrically coupled to the plurality of connection pads of the at least one semiconductor device, with the metal interconnect structure extending through vias formed through the dielectric layer so as to be connected to the plurality of connection pads. The POL structure also includes a leadframe electrically coupled to the POL sub-module, with the leadframe comprising leads configured to make an interconnection to an external circuit structure.

主权项

1. A method of forming a power overlay (POL) structure comprising:
providing a POL sub-module including a dielectric layer, at least one semiconductor device attached to the dielectric layer, and a metallic interconnect structure extending through vias in the dielectric layer to electrically connect to the at least one semiconductor device; providing a leadframe for the POL sub-module that is configured to make an interconnection between the POL sub-module and an external circuit structure, wherein the leadframe comprises a plurality of leads that are electrically coupled to the POL sub-module; attaching the POL sub-module to a multi-layer substrate comprising a first surface and a second surface; and affixing the leadframe to the multi-layer substrate, the leadframe being affixed to the multi-layer substrate either prior to attachment of the POL sub-module to the multi-layer substrate or subsequent to attachment of the POL sub-module to the multi-layer substrate; wherein the POL sub-module and each of the plurality of the leads of the leadframe is attached to the first surface of the multi-layer substrate, such that electrical coupling of the POL sub-module to the external circuit structure is achieved at a multi-layer substrate plane.