发明名称 |
Semiconductor memory device for conducting monitoring operation to verify read and write operations |
摘要 |
A semiconductor memory device includes, in part, a first data I/O block and a second data I/O block. During a write operation, the first data I/O block transmits input data supplied through a first pad to a first global I/O line, and further generates a write internal signal. The second data I/O block transmits the write internal signal to a second pad in response to a monitor enable signal. During a read operation, the first data I/O block supplies data from the first global I/O line to a first pad, and further generates a read internal signal. The second data I/O block transmits the read internal signal to the second pad in response to a monitor enable signal. |
申请公布号 |
US9165618(B2) |
申请公布日期 |
2015.10.20 |
申请号 |
US201213719018 |
申请日期 |
2012.12.18 |
申请人 |
SK hynix Inc. |
发明人 |
Kim Jin Ah |
分类号 |
G11C7/00;G11C7/22;G11C7/10;G11C7/02;G11C11/4096 |
主分类号 |
G11C7/00 |
代理机构 |
Kilpatrick Townsend & Stockton LLP |
代理人 |
Kilpatrick Townsend & Stockton LLP |
主权项 |
1. A semiconductor memory device, comprising:
a first data I/O block configured to execute a write operation to transmit a first input data from a first pad to a first global I/O line, the first data I/O block further configured to generate a write internal signal during the write operation; and a second data I/O block configured to transmit the write internal signal to a second pad in response to a monitor enable signal, wherein the first data I/O block comprises:
an input buffer configured to buffer the first input data received from the first pad, and to supply a first internal input data during the write operation; anda write path unit configured to drive the first global I/O line in response to the first internal input data, the write path unit being further configured to generate the write internal signal. |
地址 |
Icheon-si KR |