| 发明名称 | Amplification circuit having optimization of power | ||
| 摘要 | A Power amplifier circuit comprising an input, an output comprising: means for sensing the input voltage; anda set of n cascode circuits, each comprising a first transistor having a gate, a source and a drain terminal and further comprising a second transistor having gate, source and drain terminal; the source and gate of the first transistor of said cascode circuits being respectively connected to a first reference voltage and to receive the input signal, the drain of said first transistor being connected to the source of said second transistor, the drain of which being coupled to said output.;By activating or deactivating one or more of the n cascode circuits, the total size of the amplification components can be adapted to the value of the output power to generate. | ||
| 申请公布号 | US9166527(B2) | 申请公布日期 | 2015.10.20 |
| 申请号 | US201213996758 | 申请日期 | 2012.01.26 |
| 申请人 | ST-ERICSSON SA | 发明人 | Knopik Vincent |
| 分类号 | H03F1/22;H03F1/02;H03F3/193;H03F3/21;H03F3/72 | 主分类号 | H03F1/22 |
| 代理机构 | Patent Portfolio Builders PLLC | 代理人 | Patent Portfolio Builders PLLC |
| 主权项 | 1. Power amplifier circuit comprising an input, an output comprising: means for sensing an input voltage; a set of n cascode circuits, each comprising a first transistor having a gate, a source and a drain terminal and further comprising a second transistor having gate, source and drain terminal; the source and gate of the first transistor of said cascode circuits being respectively connected to a first reference voltage and to receive the input signal, the drain of said first transistor being connected to the source of said second transistor, the drain of which being coupled to said output; and a control circuit receiving the input voltage sensed by said sensing means for generating a set of control signals which are transmitted to the gates of the second transistors of said n cascode circuits;wherein the means for sensing the input voltage comprises: an additional cascode circuit in communication with the first reference voltage and the input signal; and a passive circuit in communication with the additional cascode circuit and a second reference voltage;so as to activate or deactivate some of said n cascode circuits and adapt the size of the transistors to the output power to issue to a load. | ||
| 地址 | Plan-les-Ouates CH | ||