Compact Three-Dimensional Memory

摘要

The present invention discloses a compact three-dimensional memory (3D-MC). By forming simple switching devices (e.g., pass transistors) on the address-select lines, contact vias can be shared by the address-select lines in the same memory level, or from different memory levels. This leads to sparser and fewer contact vias. Sparse contact vias can facilitate the realization of three-dimensional integrated circuit (3D-IC).

主权项

1. A compact three-dimensional memory (3D-MC) comprising at least a first memory level stacked above a semiconductor substrate with transistors thereon, said first memory level comprising:
a continuous and conductive first x-line; a contact via coupling said first x-line with said semiconductor substrate; a continuous and conductive y-line intersecting said first x-line, wherein a first memory device is formed at the intersection of said first x-line and said y-line; a continuous and conductive first control line intersecting said first x-line, wherein a first switching device is formed at the intersection of said first x-line and said first control line and between said first memory device and said contact via; wherein said first switching device is configured to block current conduction in said first x-line in a first mode and allow current conduction in said first x-line in a second mode.