MEMORY DEVICE AND SEMICONDUCTOR DEVICE

摘要

Provided is a memory device with a reduced layout area. The memory device includes a sense amplifier electrically connected to first and second wirings and positioned in a first layer, and first and second circuits positioned in a second layer over the first layer. The first circuit includes a first switch being turned on and off in accordance with a potential of a third wiring, and a first capacitor electrically connected to the first wiring via the first switch. The second circuit includes a second switch being turned on and off in accordance with a potential of a fourth wiring, and a second capacitor electrically connected to the second wiring via the second switch. The first wiring intersects the third wiring and does not intersect the fourth wiring in the second layer. The second wiring intersects the fourth wiring and does not intersect the third wiring in the second layer.

主权项

1. A memory device comprising:
a sense amplifier in a first layer; and a first circuit and a second circuit in a second layer over the first layer, wherein: the sense amplifier is electrically connected to a first wiring and a second wiring, the first circuit comprises a first switch and a first capacitor,
the first switch is configured to be turned on and off in accordance with a potential of a third wiring,the first capacitor is electrically connected to the first wiring via the first switch, the second circuit comprises a second switch and a second capacitor,
the second switch is configured to be turned on and off in accordance with a potential of a fourth wiring,the second capacitor is electrically connected to the second wiring via the second switch, the first wiring intersects the third wiring in the second layer, the second wiring intersects the fourth wiring in the second layer, the first wiring does not intersect the fourth wiring, and the second wiring does not intersect the third wiring.