DATA PROCESSING DEVICE, METHOD OF EXECUTION ERROR DETECTION AND INTEGRATED CIRCUIT

摘要

A data processing device provided with an error detection unit includes a processor arranged to support execution of an operation including a first sequence of instructions and execution of a second sequence of instructions implementing the operation, the first and second sequences of instructions generating, when in use, a first result and a second result, respectively. Configurable circuitry is also provided and arranged to support a repository to receive the first result and the second result following generation thereof. The configurable circuitry is configured as a function comparator unit arranged to compare the first and second results for consistency and to control further execution of the first implementation and the second implementation in response to a result of the comparison.

主权项

1. A data processing device provided with an error detection unit, the device comprising:
a processor arranged to support execution of an operation and configured to execute a first sequence of instructions in accordance with a first implementation of the operation and a second sequence of instructions in accordance with a second implementation of the operation, the first and second sequences of instructions generating, when executed, a first result and a second result, respectively; and configurable circuitry arranged to support a repository to receive the first result and the second result following generation thereof; wherein the configurable circuitry is configured as a function comparator unit arranged to compare the first and second results for consistency and to control further execution of the first implementation and the second implementation in response to a result of the comparison, wherein the function comparator unit comprises a first watchdog timer unit arranged to police a first time period in response to an instruction to perform the operation.