发明名称 Pipelined Video Decoder System
摘要 Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.
申请公布号 US2015296213(A1) 申请公布日期 2015.10.15
申请号 US201414335715 申请日期 2014.07.18
申请人 Broadcom Corporation 发明人 Hellman Timothy Moore
分类号 H04N19/42;H04N19/433;H04N19/44 主分类号 H04N19/42
代理机构 代理人
主权项 1. A device comprising: circuitry configured to decode a current block within a frame of video data, the frame comprised of a plurality of blocks; circuitry configured to identify an intra-block copy request (IBC request) for the current block, wherein the IBC request comprises copying content from a source block to the current block of the frame, wherein the source block is within said frame and has been decoded; circuitry configured to identify first content within the source block that is in an external memory and a second content within the source block that is in an internal memory; circuitry configured to pre-fetch the content of the source block from the external memory; and circuitry configured to copy the content of the source block from the internal memory.
地址 Irvine CA US