| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To improve the performance of arithmetic processing of a processor by preventing an unneeded instruction from being executed when executing an instruction whose execution cycle dynamically changes. <P>SOLUTION: The processor includes: a fetching part for fetching a first instruction from an instruction memory storing an instruction group being a plurality of first instructions whose number corresponds to the number of the maximum execution cycles to execute the first instruction, the number of execution cycles of which dynamically changes; an address register for holding an address of the instruction memory storing a next instruction of the instruction group; a decoding part for decoding an instruction fetched by the fetching part; and an operation part for receiving the instruction decoded by the decoding part to execute an arithmetic operation, and outputting an end signal when determining the completion of an arithmetic operation needed to execute the first instruction, and the fetching part fetches the next instruction from the instruction memory by using an address in the address register in response to the end signal. <P>COPYRIGHT: (C)2013,JPO&INPIT</p> |
