发明名称 Multi-level memory apparatus and data sensing method thereof
摘要 A multi-level memory apparatus includes two or more current paths configured to pass currents having different levels, a memory cell selectively coupled to the two or more current paths, and a cell current copy unit configured to copy a cell current flowing through the memory cell.
申请公布号 US9159411(B2) 申请公布日期 2015.10.13
申请号 US201313935407 申请日期 2013.07.03
申请人 SK Hynix Inc.;Korea Advanced Institute of Science and Technology 发明人 Park Chul Hyun;Ryu Seung Tak;Kwon Ji Wook;Jin Dong Hwan
分类号 G11C7/00;G11C13/00;G11C11/56 主分类号 G11C7/00
代理机构 代理人
主权项 1. A multi-level memory apparatus comprising: two or more current paths configured to pass currents having different levels; a memory cell selectively coupled to the two or more current paths; a cell current copy unit configured to copy a cell current flowing through the memory cell and output a copied cell current; a comparison unit configured to compare the copied cell current flowing through the cell current copy unit with a copied comparison current; a data output unit configured to convert an output signal of the comparison unit and output a comparison signal; a comparison current output unit configured to output a comparison current using the comparison signal outputted from the data output unit; and a comparison current copy unit configured to copy the comparison current and output the copied comparison current.
地址 Icheon KR