Method and apparatus for optimizing memory usage in an imaging device

摘要

A system including a communication interface, a memory, and a processor. The communication interface is configured to receive data. The memory is divided into a first retention region and a second retention region, wherein the first retention region is configured to store data for a first predetermined period of time, and the second retention region is configured to store data for a second predetermined period of time. The processor is configured to i) initially store, within the first retention region of the memory, the data that is received, and ii) in response to the data that is received having been stored in the first retention region of the memory for a time limit that exceeds the first predetermined period of time, transfer the data that is received from the first retention region of the memory to the second retention region of the memory.

主权项

1. A system comprising:
a memory divided into a plurality of regions, wherein a first region of the plurality of regions is configured to store data for a first predetermined period of time, the first predetermined period of time being based on a number of times data has been written to the first region, and wherein a second region of the plurality of regions is configured to store data for a second predetermined period of time, the second predetermined period of time being longer than the first predetermined period of time; a communication interface configured to receive data for storage in the memory; and a processor configured to determine a length of time that the data received by the communication interface is to be stored, wherein in response to the length of time that the data received by the communication interface is to be stored is less than the first predetermined time period, the processor is configured to write the data received by the communication interface to the first region of the memory, wherein the first predetermined time period is further reduced based on the data received by the communication interface being written to the first region of the memory, and wherein in response to the length of time that the data received by the communication interface is to be stored is greater than the first predetermined time period, the processor is configured to write the data received by the communication interface to the second region of the memory, wherein the first predetermined time period is not affected based on the data received by the communication interface being written to the second region of the memory.