Device and method for reducing contact resistance of a metal

摘要

A structure for an integrated circuit includes a substrate, a cap layer deposited on the substrate, a dielectric layer deposited on the cap layer, and a trench embedded in the dielectric layer. The trench includes a TaN layer deposited on a side wall of the trench wherein the TaN layer has a greater concentration of nitrogen than tantalum, a Ta layer deposited on the TaN layer, and a Cu deposited on the Ta layer. The structure further includes a via integrated into the trench at bottom of the filled trench. In an embodiment, both the TaN layer and the Ta layer are formed with physical vapor deposition (PVD) wherein the TaN layer is formed with plasma sputtering a Ta target with an N2 flow at least 20 sccm.

主权项

1. A structure for an integrated circuit, the structure comprising:
a substrate; a cap layer deposited on the substrate; a dielectric layer deposited on the cap layer; and a trench embedded in the dielectric layer, wherein the trench includes: a TaN layer formed on a side wall of the trench, wherein the TaN layer has a greater concentration of nitrogen than tantalum; a Ta layer formed over the TaN layer; and a Cu-containing layer formed over the Ta layer, wherein an overall carbon (C) concentration of the TaN layer and the Ta layer is lower than about 0.2 percent (%).