发明名称 Integrated Circuits Having a Plurality of High-K Metal Gate FETs with Various Combinations of Channel Foundation Structure and Gate Stack Structure and Methods of Making Same
摘要 Semiconductor manufacturing processes include forming conventional channel field effect transistors (FETs) and deeply depleted channel (DDC) FETs on the same substrate and selectively forming a plurality of gate stack types where those different gate stack types are assigned to and formed in connection with one or more of a conventional channel NFET, a conventional channel PFET, a DDC-NFET, and a DDC-PFET in accordance a with a predetermined pattern.
申请公布号 US2015287645(A1) 申请公布日期 2015.10.08
申请号 US201514747372 申请日期 2015.06.23
申请人 Mie Fujitsu Semiconductor Limited 发明人 Zhao Dalong;Ranade Pushkar;McWilliams Bruce
分类号 H01L21/8238 主分类号 H01L21/8238
代理机构 代理人
主权项
地址 Kuwana JP