TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS

摘要

Embodiments of the present invention provide an improved semiconductor structure and methods of fabrication that provide transistor contacts that are self-aligned in two dimensions. Two different capping layers are used, each being comprised of a different material. The two capping layers are selectively etchable to each other. One capping layer is used for gate coverage while the other capping layer is used for source/drain coverage. Selective etch processes open the desired gates and source/drains, while block masks are used to cover elements that are not part of the connection scheme. A metallization line (layer) is deposited, making contact with the open elements to provide electrical connectivity between them.

主权项

1. A method of forming a semiconductor structure comprising:
covering a plurality of transistor gates with a first capping layer; covering a plurality of source/drain contact areas with a second capping layer; forming a first mask over the semiconductor structure, wherein the first mask exposes a plurality of gate contact locations; removing the first capping layer from the plurality of gate contact locations; forming a second mask over the semiconductor structure, wherein the second mask exposes a plurality of source/drain contact locations; removing the second capping layer from the plurality of source/drain contact locations; and depositing a metallization layer over the exposed source/drain contact locations and exposed gate contact locations.