GATE DRIVING CIRCUIT, DRIVING METOHD FOR GATE DRIVING CIRCUIT AND DISPLAY PANEL USING THE SAME

摘要

A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.

主权项

1. A gate driving circuit comprising:
a plurality of stages configured to output a gate signal to a corresponding gate line, wherein one of the plurality of stages includes:
a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node;a first capacitor including a terminal connected to the first node and another terminal connected to an output terminal of the first transistor;a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied;a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; anda fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, and wherein the fourth transistor is switched according to an output signal of a next stage.