发明名称 PIXEL CIRCUIT AND DISPLAY DEVICE USING THE SAME
摘要 A pixel circuit includes four transistors, two capacitors and a light emitting element. A gate of first transistor receives a scan signal and a source/drain thereof receives a display data. A terminal of first capacitor couples to another source/drain of first transistor. A gate and a source/drain of second transistor couple to another terminal of first capacitor; and another source/drain thereof receives a switch signal. A terminal of second capacitor receives a reset signal; and another terminal thereof couples to another terminal of first capacitor. A gate of third transistor couples to a terminal of first capacitor. A gate of fourth transistor receives an enable signal; a source/drain thereof couples to a first power supply voltage; and another source/drain thereof couples to one source/drain of third transistor. The anode and cathode of the light emitting element couple to one source/drain of third transistor and a second power supply voltage, respectively.
申请公布号 US2015287364(A1) 申请公布日期 2015.10.08
申请号 US201414444157 申请日期 2014.07.28
申请人 AU OPTRONICS CORP. 发明人 CHANG Hua-Gang;SHIH Man-Wen;LO Ching-Kai;HUANG Chien-Chung
分类号 G09G3/32 主分类号 G09G3/32
代理机构 代理人
主权项 1. A pixel circuit, comprising: a first transistor, comprising a first gate, a first source/drain and a second source/drain, wherein the first gate is for receiving a scan signal, and the first source/drain is for receiving a display data; a first capacitor, comprising a first terminal and a second terminal, wherein the first terminal is electrically coupled to the second source/drain; a second transistor, comprising a second gate, a third source/drain and a fourth source/drain, wherein the second gate and the third source/drain are electrically coupled to the second terminal of the first capacitor, and the fourth source/drain is for receiving a switch signal; a second capacitor, comprising a third terminal and a fourth terminal, wherein the third terminal is for receiving a reset signal, and the fourth terminal is electrically coupled to the second terminal of the first capacitor; a third transistor, comprising a third gate, a fifth source/drain and a sixth source/drain, wherein the third gate is electrically coupled to the first terminal of the first capacitor; a fourth transistor, comprising a fourth gate, a seventh source/drain and an eighth source/drain, wherein the fourth gate is for receiving an enable signal, the seventh source/drain is electrically coupled to a first power supply voltage, and the eighth source/drain is electrically coupled to the fifth source/drain; and a light emitting element, comprising an anode and a cathode, wherein the anode is electrically coupled to the sixth source/drain, and the cathode is electrically coupled to a second power supply voltage, wherein the second power supply voltage is smaller than the first power supply voltage.
地址 Hsin-Chu TW