发明名称 |
CACHE MEMORY, ERROR CORRECTION CIRCUIT, AND PROCESSOR SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide a cache memory and error correction circuit that can reduce overhead due to error correction processing.SOLUTION: A cache memory 1 includes: a cache memory unit that can be accessed in units of cache lines; and a redundant code storage unit that stores a first redundant code for performing error correction for each cache line data which is stored in the cache memory unit in units of cache lines and a second redundant code for performing error correction of part of each cache line data. |
申请公布号 |
JP2015179307(A) |
申请公布日期 |
2015.10.08 |
申请号 |
JP20140055343 |
申请日期 |
2014.03.18 |
申请人 |
TOSHIBA CORP |
发明人 |
TAKEDA SUSUMU;NOGUCHI HIROKI;IKEGAMI KAZUTAKA;FUJITA SHINOBU |
分类号 |
G06F12/08;G06F12/16 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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