发明名称 DUAL TRENCH RECTIFIER AND METHOD FOR FORMING THE SAME
摘要 A structure of dual trench rectifier comprises of the following elements. A plurality of trenches are formed parallel in an n− epitaxial layer on an n+ semiconductor substrate and spaced with each other by a mesa. A plurality of recesses are formed on the mesas. Each the trench has a trench oxide layer formed on the sidewalls and bottom thereof, and a first poly silicon layer is filled therein to form MOS structures. Each the recess has a recess oxide layer formed on the sidewalls and bottom thereof, and a second poly silicon layer is filled therein to form MOS structures. A plurality of p type bodies are formed at two sides of the MOS structures in recesses. A top metal is formed above the semiconductor substrate for serving as an anode. A bottom metal is formed beneath the semiconductor substrate for serving as a cathode.
申请公布号 US2015287720(A1) 申请公布日期 2015.10.08
申请号 US201514746248 申请日期 2015.06.22
申请人 JIN Qinhai;CHIP INTEGRATION TECH. CO., LTD. 发明人 JIN Qinhai
分类号 H01L27/08;H01L29/06;H01L29/45;H01L29/47;H01L29/872;H01L29/861 主分类号 H01L27/08
代理机构 代理人
主权项 1. A dual trench rectifier comprising: a plurality of trenches formed in parallel in an n− epitaxial layer on a heavy doped n+ semiconductor substrate, wherein the trenches each has a trench oxide layer formed on a bottom and sidewalls thereof; a plurality of recesses formed in the n− epitaxial layer at mesas between the plurality of trenches, having a recess oxide layer formed on a bottom and sidewalls thereof; a first polysilicon layer doped with conductive impurities filled in the plurality of trenches; a plurality of rows of second polysilicon layer with conductive impurities overfilled the plurality of recesses and over the plurality of trenches, and an oxide layer also being formed therebetween the second polysilicon layer and the first polysilicon layer in the trenches; a plurality of p type bodies formed in the n− epitaxial layer at the mesas regions and adjacent to the plurality of rows of second polysilicon layer; and a top metal layer formed on the resulted front surface including the plurality of rows of second polysilicon layer, the plurality of p type bodies, and an exposed portion of the first polysilicon layer thereto for serving as an anode, and a bottom metal layer formed beneath the heavy doped n+ semiconductor substrate for serving as a cathode.
地址 US