CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

摘要

A chip package structure includes a lead frame having first and second patterned metal layers and an insulation layer, a chip, and an encapsulant covering the first patterned metal layer and the chip. The first patterned metal layer includes a chip pad with first recesses and bonding pads in the first recesses. A first groove exists between each bonding pad and the chip pad. The second patterned metal layer connecting the first patterned metal layer includes terminal pads and a heat dissipation block thermally coupled to the chip pad. The heat dissipation block includes second recesses where the terminal pads are located and electrically connected to the corresponding bonding pads. A second groove exists between each terminal pad and the heat dissipation block. The insulation layer is located between the bonding pads and the terminal pads. The chip on the chip pad is electrically connected to the bonding pads.

主权项

1. A chip package structure comprising:
a lead frame comprising:
a first patterned metal layer comprising a chip pad and a plurality of bonding pads, the chip pad comprising a plurality of first recesses, the first recesses being located at a periphery of the chip pad, the bonding pads being respectively located in the first recesses, a first groove existing between each of the bonding pads and the chip pad;a second patterned metal layer connected to the first patterned metal layer, the second patterned metal layer comprising a heat dissipation block and a plurality of terminal pads, the heat dissipation block being thermally coupled to the chip pad and comprising a plurality of second recesses, the second recesses being located at a periphery of the heat dissipation block, the terminal pads being respectively located in the second recesses and electrically connected to the corresponding bonding pads, a second groove existing between each of the terminal pads and the heat dissipation block; andan insulation layer located between the bonding pads and the terminal pads; a chip disposed on the chip pad and electrically connected to the bonding pads; and an encapsulant covering the first patterned metal layer and the chip.