| 摘要 |
The present invention relates to a semiconductor memory device, which comprises: a refresh counting unit for counting input of refresh signals and generating a smart refresh enable signal when the input reaches a predetermined number of times; an address calculating unit for latching an address, performing addition to and subtraction from the latched address when the smart refresh enable signal is enabled, and outputting the result as an calculation address; and an address selecting unit for outputting one among the calculation address and the address as a selection address in response to the smart refresh enable signal. |
